Senior Physical Design Engineer

* 12 year physical design/flow development experience in CPU/SOC for server and mobile processors using sub-micron technology nodes including 28nm, 16/12 nm, 10nm, 5nm, and 3nm in various companies which are Intel, Broadcom, Spreadtrum, Apple, and NVIDIA * Moreover, I am specialized in RTL to GDSII including synthesis, LEC, floor planning, clock design, STA, PV, ECOs, VCLP and also proficient in TCL/Perl/Python scripting for design automation and flow development.